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| [AKD4627-A] evaluation board rev.0 for ak4627 a kd4627- a general description the AKD4627-A is an evaluation board for the ak4627, a single chip co dec that includes four channels of adc and six channels of dac. t he AKD4627-A also has the digital audi o interface and can achieve the interface with digital audio system s via opt-connector or bnc connector. ? ordering guide AKD4627-A --- ak4627 evaluation board (cable for connecting with printer port of ibm-at compatible pc and control software are packed with this .) this control software can?t operate on windows nt. function ? on-board analog output buffer circuit ? compatible with 2 types of interface - ak4118 (dit&dir) with optical output/input and bnc output/input - direct interface with ac3 decoder by 10pin header ? 10pin header for serial control interface lout2 rout2 lout3 rout3 dvdd ak4627 ak4118 (d it&di r) 10p in he ad er 10pi n header control data bnc in opt in opt out a c3 -12v +12v regulator lin1+/lin1 lin1- output buffer bnc out regulator regulator +3.3v av d d tvdd gnd +5 v lout1 rout1 lin2+/lin2 lin2- figure 1 AKD4627-A block diagram *circuit diagram and pcb layout are att ached at the end of this manual. [AKD4627-A] evaluation board manual ? operation sequence 1) set up the power supply lines. (1-1) in case of using separate power supply lines [AKD4627-A] ? control mode (1) parallel control mode [AKD4627-A] jp31 lin2+ jp32 lin2- jp35 rin2+ canon rca canon gnd jp36 rin2- canonrca canongnd (1-1-2) evaluation of adc using dit of ak4118 when differential inputs [AKD4627-A] (2) evaluation of dac using dir of ak4118 [AKD4627-A] ? dip switch set up [sw2] (mode1): mode settings for ak4627. about the tdm mode of ak4627, please refer to page 18 of ak4627?s datasheet. no. name ?h? ?l? default 1 tdm0 tdm mode normal mode l 2 sgl adc single-ended input mode adc differential input mode l 3 i2c i2c bus 3-wire serial l 4 dfs0 double speed normal speed l 5 dzfe zero input detect. refer to the datasheet p23 of the ak4627. l 6 ps parallel control mode serial control mode h 7 cad1 l 8 cad0 chip address select. refer to table 9 l table 3 mode setting for ak4627 [sw3] (ak4118 mode_setting): mode setting for ak4118. no. name ?h? ?l? default 1 dif2 h 2 dif1 l 3 dif0 ak4118?s audio data format settings, and ak4627?s audio data format settings when parallel control mode. see table 5 and table 6 l 4 ocks1 h ak4118?s master clock settings. table 7 see 5 ocks0 l 6 cm1 l 7 cm0 ak4118?s clock operation mode select. table 8 see l table 4 mode setting for ak4118 ak4118?s audio data format and ak4627?s audio data format are set up at th e same time by settings of sw3-1 (dif2), sw3-2 (dif1) and sw3-3 (dif0) when ak4627 is on parallel control mode. sw3-1 sw3-2 sw3-3 dif0 ak4627 ak4627 ak4118 ak4118 lrck bick dif2 dif1 dif1 dif0 daux sdto 0 1 0 0 0 24bit, left justified 20bit, right justified h/l o 64fs o 0 1 1 0 1 24bit, left justified 24bit, right justified h/l o 64fs o 1 0 0 1 0 24bit, left justified 24bit, left justified h/l o 64fs o (default) 1 0 1 1 1 24bit, i 2 s 24bit, i 2 s l/h o 64fs o table 5 ak4118?s audio data format ( parallel control mode ) it is necessary to set dif1-0 bits of ak4627?s registers and sw3-1 (dif2), sw3-2 (dif1), sw3-3 (dif0) to the same audio data format when ak4627 is on serial control mode. mode dif1 dif0 sdto1-2 sdti1-3 0 0 0 24bit, left justified 20bit, right justified 1 0 1 24bit, left justified 24bit, right justified 2 1 0 24bit, left justified 24bit, left justified (default) 3 1 1 24bit, i 2 s 24bit, i 2 s table 6 ak4627?s audio data formats ( serial control mode ) [AKD4627-A] ak4118 supplies ak4627?s master clock with mcko1. mcko1 mcko2 x?tal fs (max) no. ocks1 ocks0 0 0 0 256fs 256fs 256fs 96 khz 1 0 1 256fs 128fs 256fs 96 khz 2 1 0 512fs 256fs 512fs 48 khz (default) 3 1 1 128fs 64fs 128fs 192 khz table 7 ak4118?s master clock frequency select (stereo mode) mode cm1 cm0 pll x'tal clock source sdto 0 0 0 on on pll rx (default) 1 0 1 off on x'tal daux on on pll rx 2 1 0 on on x'tal daux 3 1 1 on on x'tal daux on: oscillation (power-up), off: stop (power-down) table 8 ak4118?s clock operation mode select ? other jumper pins set up 1. jp81 (gnd) : connection between agnd and dgnd. open : agnd and dgnd are separated on the board. short : agnd and dgnd are connected on the board. [AKD4627-A] ? serial control the ak4627 can be controlled via the printer port (parallel port) of ibm-at compatible pc. connect port3 (ctrl) with pc by 10 wire flat cable packed with the AKD4627-A. connect cdto/sda(ack) cclk/scl cdti/sda 10pin header 10pin connector 10 wire flat cable pc AKD4627-A 2 10 9 port3 ctrl red csn figure 2 connect of 10 wire flat cable the ak4627 supports 3-wire serial control mode a nd i2c-bus control mode (fast-mode, max : 400khz). please set the jump pins: jp61 (sel1), jp63 (sel2) and jp62 (sel3), referred to (2) serial control mode. sw2-7 (cad1) sw2-8 (cad0) mode chip address r/w 00 0 0 write only (default) 01 0 1 write only 10 1 0 write only 3-wire 11 1 1 write only 00 0 0 r/w 01 0 1 r/w 10 1 0 r/w i2c 11 1 1 r/w table 9 select interface and chip address [AKD4627-A] ? analog input/output circuits 1. analog input circuits canon rca canon gnd j5 lina1 2 2 3 3 1 1 jp33 lin1+ jp34 lin1- lin1+/lin1 lin1- linb1 j9 mr-552ls 2 3 1 jp37 rin1+ jp38 rin1- rin1+/rin1 rin1- rinb1 j10 mr-552ls 2 3 1 j6 rina 1 gnd rca canon canon 2 2 3 3 1 1 jp35 rin2+ jp36 rin2- rin2+/rin2 rin2- rinb2 j8 mr-552ls 2 3 1 jp31 lin2+ j3 lina2 jp32 lin2- lin2+/lin2 lin2- linb2 j7 mr-552ls 2 3 1 rca rca gnd gnd canon canon canon canon 2 2 3 3 1 1 j4 rina 2 2 2 3 3 1 1 figure 3 AKD4627-A analog input circuits [AKD4627-A] 2. analog output circuits r116 (open) c102 (short) j12 rout2 r119 (open) c105 (short) r94 4.7k + c49 22u + c43 22u +12v rout2 -12v r118 (open) c104 (short) j14 lout1 j11 rout1 r44 220 r41 10k -12v r43 4.7k + - u4b op275gpz 5 6 7 8 4 +12v r42 4.7k + c41 22u + c47 22u c48 330p lout1 -12v +12v r92 220 r89 10k + - u4a op275gpz 3 2 1 8 4 r91 4.7k r90 4.7k c42 330p rout1 r115 (open) c101 (short) r48 220 r45 10k r47 4.7k r46 4.7k + - u5b op275gpz 8 5 6 7 4 c44 330p c50 330p lout2 -12v +12v r96 220 r93 10k + - u5a op275gpz 8 3 2 1 4 j15 lout2 r95 4.7k j16 lout3 -12v r117 (open) c103 (short) j13 rout3 + c51 22u + c45 22u r120 (open) c106 (short) c52 330p c46 330p rout3 -12v +12v r88 220 r49 10k + - u6b op275gpz 8 5 6 7 4 r87 4.7k r50 4.7k lout3 +12v r113 220 r97 10k + - u6a op275gpz 8 3 2 1 4 r99 4.7k r98 4.7k figure 4 AKD4627-A analog output circuits [AKD4627-A] control soft manual evaluation board and control soft settings 1. set an evaluation board properly. 2. connect the evaluation board to an ibm pc/at compatible pc by a 10 wire flat cable. be aware of the direction of the 10pin header. when running this control soft on the windows 2000/xp, the driver which is included in the cd must be installed. refer to the ?dri ver control install manual for akm devi ce control software? for installing the driver. when running this control soft on the windows 95/98/me, driver installing is not necessary. this control soft does not support the windows nt. 3. continue the evaluation by following the process below. operation screen 1. start up the control program following the process above. the operation screen is shown below. [AKD4627-A] operation overview register map and testing tool can be controlled by this control soft. these controls are selected by upper tabs. buttons which are frequently used such as register initializing button ?write default?, are located outside of the switching tab window. refer to the ?dialog boxes? for details of each dialog box setting. 1. [port reset]: for when connecting to usb i/f board (akdusbif-a) click this button after the control soft starts up when connecting usb i/f board (akdusbif-a). 2. [write default]: register initializing when the device is reset by a hardware reset, use this button to initialize the registers. 3. [all write]: executing write commands for all registers displayed. 4. [all read]: executing read comma nds for all registers displayed. 5. [save]: saving current register settings to a file. 6. [load]: executing data write from a saved file. 7. [all reg write]: ?all reg write? dialog box is popped up. 8. [data r/w]: ?data r/w? dialog box is popped up. 9. [sequence]: ?sequence? dialog box is popped up. 10. [sequence(file)]: ?sequence(file)? dialog box is popped up. 11. [read]: reading current register settings and display on to the register area (on the right of the main window). this is different from [all read] button, it does not reflect to a register map, only displaying hexadecimal. [AKD4627-A] 1. [reg]: register map this tab is for a register writing and reading. each bit on the register map is a push-button switch. button down indicates ?h? or ?1? and the bit name is in red (when read only it is in deep red). button up indicates ?l? or ?0? and the bit name is in blue (when read only it is in gray) the registers which is not defined in the datasheet are indicated as ?---?. [AKD4627-A] [write]: data writing dialog it is for when changing two or more bits on the same address at the same time. click [write] button located on the right of th e each corresponded address for a pop-up dialog box. when checking the checkbox, the register will be ?h? or ?1?, when not checki ng the register will be ?l? or ?0?. click [ok] to write setting value to the registers, or click [cancel] to cancel this setting. [read]: data read click [read] button located on the right of the each corresponded address to execu te register reading. after register reading, the display will be updated regarding to th e register status. button down indicates ?h? or ?1? and the bit name is in red (when read only it is in deep red). button up indicates ?l? or ?0? and the bit name is in blue (when read only it is in gray) please be aware that button statuses will be changed by read command. [AKD4627-A] 2. [tool]: testing tools this tab screen is for evaluation testing tool. click buttons for each testing tool. [AKD4627-A] ? dialog boxes 1. [all reg write]: all register write dialog box click [all reg write] button in the main window to open register setting files. register setting files saved by [save] button can be applied. [open (left)]: selecting a register setting file (*.akr). [write]: executing register writing. [write all]: executing all register writings. writings are executed in descending order. [help]: help window is popped up. [save]: saving the register setting file a ssignment. the file name is ?*.mar?. [open (right)]: opening a saved register setting file assignment ?*. mar?. [close]: closing the dialog box and finish the process. *operating suggestions (1) those files saved by [save] button and opened by [o pen] button on the right of the dialog ?*.mar? should be stored in the same folder. (2) when register settings are changed by [save] button in the main window, re-read the file to reflect new register settings. [AKD4627-A] 2. [data r/w]: data r/w dialog box click the [data r/w] button in the main window for data read/write dialog box. data write is available to specified address. address box: input data address in hexadecimal numbers for data writing. data box: input data in hexadecimal numbers. mask box: input mask data in hexadecimal numbers. this is ?and? processed input data. [write]: writing to the address specified by ?address? box. [read]: reading from the address specified by ?address? box. the result will be shown in the read data box in hexadecimal numbers. [close]: closing the dialog box and finish the process. data writing can be cancelled by this button instead of [write] button. *the register map will be updated afte r executing [write] or [read] commands. [AKD4627-A] 3. [sequence]: sequence dialog box click [sequence] button to open register sequence setting dialog box. register sequence can be set in this dialog box. sequence setting set register sequence by following process bellow. (1)select a command use [select] pull-down box to choose commands. corresponding boxes will be valid. < select pull-down menu > no_use: not using this address register: register writing reg(mask): register writing (masked) interval: taking an interval stop: pausing the sequence end: finishing the sequence (1) input sequence [address]: data address [data]: writing data [mask]: mask [data] box data is anded w ith [mask] box data. this is the actual writing data. when mask = 0x00, current setting is hold. when mask = 0xff, the 8bit data which is set in the [data] box is written. when mask =0x0f, lower 4bit da ta which is set in the [data] box is written. upper 4bit is hold to current setting. [AKD4627-A] [ interval ]: interval time valid boxes for each process command are shown bellow. no_use: none register: [address], [data], [interval] reg(mask): [address], [data], [mask], [interval] interval: [interval] stop: none end: none control buttons the function of control button is shown bellow. [start]: executing the sequence [help]: opening a help window [save]: saving sequence settings as a file. the file name is ?*.aks?. [open]: opening a sequence setting file ?*.aks?. [close]: closing the dialog box and finish the process. stop of the sequence when ?stop? is selected in the sequence, processing is pa used and it starts again when [start] button is clicked. restarting step number is shown in the ?start step? box. when finishing the pr ocess until the end of sequence, ?start step? will return to ?1?. the sequence can be started from any step by writing the step number to the ?start step? box. write ?1? to the ?start step? box and click [start] button, when restarting the process from the beginning. [AKD4627-A] 4. [sequence(file)]: sequence setting file dialog box click [sequence(file)] button to open sequence setting file dialog box. those files saved in the ?sequence setting dialog? can be applied in this dialog. [open (left)]: opening a sequence setting file (*.aks). [start]: executing the sequence setting. [start all]: executing all sequence settings. sequences are executed in descending order. [help]: pop up the help window. [save]: saving sequence setting file assi gnment. the file name is ?*.mas?. [open(right)]: opening a saved sequence setting file assignment ?*. mas?. [close]: closing the dialog box and finish the process. *operating suggestions (1) those files saved by [save] button and opened by [o pen] button on the right of the dialog ?*.mas? should be stored in the same folder. (2) when ?stop? is selected in the sequence the process will be paused and a pop-up message will appear. click ?ok? to continue the process. [AKD4627-A] measurement results 1) adc part [measurement condition] ? measurement unit : audio precision, system two, cascade ? mclk : 512fs at 48khz, 256fs at 96khz ? bick : 64fs ? fs : 48khz, 96khz ? bw : 20hz 20khz at fs=48khz, 20hz 40khz at 96khz ? bit : 24bit ? power supply : avdd=dvdd= tvdd=5v ? interface : dit (ak4118) ? temperature : room a) single-ended inputs fs=48khz parameter input signal measurement filter lin1 rin1 units s/(n+d) 1khz, -0.5dbfs 20khz lpf 96.9 96.5 db 20khz lpf 99.8 99.9 db dr 1khz, -60dbfs 20khz lpf+a-weighted 102.7 102.7 db 20khz lpf 99.9 100.1 db s/n no signal 20khz lpf+a-weighted 102.8 103.1 db fs=96khz parameter input signal measurement filter lin1 rin1 units s/(n+d) 1khz, -0.5dbfs 40khz lpf 93.1 93.0 db 40khz lpf 98.0 98.1 db dr 1khz, -60dbfs 40khz lpf+a-weighted 104.7 104.8 db 40khz lpf 98.1 98.1 db s/n no signal 40khz lpf+a-weighted 105.2 105.2 db b) differential inputs fs=48khz parameter input signal measurement filter units lin1 rin1 s/(n+d) 1khz, -0.5dbfs 20khz lpf 98.3 97.4 db 20khz lpf 100.2 100.3 db dr 1khz, -60dbfs 20khz lpf+a-weighted 102.9 103.0 db 20khz lpf 100.4 100.4 db s/n no signal 20khz lpf+a-weighted 103.3 103.3 db fs=96khz parameter input signal measurement filter units lin1 rin1 s/(n+d) 1khz, -0.5dbfs 40khz lpf 95.9 95.5 db 40khz lpf 98.4 98.5 db dr 1khz, -60dbfs 40khz lpf+a-weighted 105.2 105.4 db 40khz lpf 98.4 98.5 db s/n no signal 40khz lpf+a-weighted 105.6 105.5 db [AKD4627-A] 2) dac part [measurement condition] ? measurement unit : audio precision, system two, cascade ? mclk : 512fs at 48khz, 256fs at 96khz, 128fs at 192khz ? bick : 64fs ? fs : 48khz, 96khz, 192khz ? bw : 20hz 20khz at fs=48khz, 20hz 40khz at 96khz, 20hz~40khz at 192khz ? bit : 24bit ? power supply : avdd=dvdd= tvdd=5v ? interface : dir (ak4118) ? temperature : room fs=48khz parameter input signal measurement filter lout1 rout1 units s/(n+d) 1khz, 20khz brick-wall lpf db 101.5 100.4 0dbfs 20khz brick-wall lpf 103.3 103.2 db dr 1khz, -60dbfs 20khz brick-wall lpf a-weighted db 105.7 105.7 20khz brick-wall lpf 103.3 103.1 db s/n no signal 20khz brick-wall lpf a-weighted db 105.8 105.7 fs=96khz parameter input signal measurement filter lout1 rout1 units s/(n+d) 1khz, 40khz brick-wall lpf 0dbfs 99.3 98.1 db 40khz brick-wall lpf 100.6 100.5 db dr 1khz, -60dbfs 40khz brick-wall lpf a-weighted db 105.6 105.5 40khz brick-wall lpf 100.6 100.5 db s/n no signal 40khz brick-wall lpf a-weighted db 105.6 105.5 fs=192khz parameter input signal measurement filter lout1 rout1 units s/(n+d) 1khz, 40khz brick-wall lpf 0dbfs 98.3 97.6 db 40khz brick-wall lpf 100.5 100.6 db dr 1khz, -60dbfs 40khz brick-wall lpf a-weighted db 105.6 105.5 40khz brick-wall lpf 100.7 100.5 db s/n no signal 40khz brick-wall lpf a-weighted db 105.6 105.5 [AKD4627-A] 1.1.1 adc (fs=48khz, single-ended inputs) -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s 20 20k 50 100 200 500 1k 2k 5k 10k hz fft (input=-0.5dbr, fin=1khz) -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s 20 20k 50 100 200 500 1k 2k 5k 10k hz fft (input=-60dbr, fin=1khz) [AKD4627-A] fft (noise floor) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b f s thd + n vs. input level (fin=1khz) 20 20k 50 100 200 500 1k 2k 5k 10k hz -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b f s thd + n vs. input frequency (input=-0.5dbr) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s tt tt t linearity (fin=1khz) v 20 20k 50 100 200 500 1k 2k 5k 10k hz -2 +1 -1.7 -1.4 -1.1 -0.8 -0.5 -0.2 +0.1 +0.4 +0.7 d b f s frequency response (input level=-0.5dbr) [AKD4627-A] 20 20k 50 100 200 500 1k 2k 5k 10k hz -140 -60 -132 -124 -116 -108 -100 -92 -84 -76 -68 d b crosstalk (input level=-0.5dbr) [AKD4627-A] 1.1.2 adc (fs=96khz, single-ended inputs) 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s fft (input=-0.5dbr, fin=1khz) 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s fft (input=-60dbr, fin=1khz) [AKD4627-A] 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s fft (noise floor) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b f s thd + n vs. input level (fin=1khz) 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b f s thd + n vs. input frequenc y (input level=-0.5dbr) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s tt tt linearity (fin=1khz) 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -2 +1 -1.7 -1.4 -1.1 -0.8 -0.5 -0.2 +0.1 +0.4 +0.7 d b f s frequency response (input level=-0.5dbr) [AKD4627-A] 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -140 -60 -130 -120 -110 -100 -90 -80 -70 d b crosstalk [AKD4627-A] 1.2.1 adc (fs=48khz, differential inputs) 20 20k 50 100 200 500 1k 2k 5k 10k hz -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s fft (input=-0.5dbr, fin=1khz) 20 20k 50 100 200 500 1k 2k 5k 10k hz -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s fft (input=-60dbr, fin=1khz) [AKD4627-A] 20 20k 50 100 200 500 1k 2k 5k 10k hz -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s fft (noise floor) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b f s thd + n vs. input level (fin=1khz) 20 20k 50 100 200 500 1k 2k 5k 10k hz -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b f s thd + n vs. input frequency (input=-0.5dbr) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s ttt linearity (fin=1khz) 20 20k 50 100 200 500 1k 2k 5k 10k hz -2 +1 -1.8 -1.6 -1.4 -1.2 -1 -0.8 -0.6 -0.4 -0.2 +0 +0.2 +0.4 +0.6 +0.8 d b f s frequency response (input level=-0.5dbr) [AKD4627-A] 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 -60 -150 -140 -130 -120 -110 -100 -90 -80 -70 d b crosstalk (input level=-0.5dbr) [AKD4627-A] 1.2.2 adc (fs=96khz, differential inputs) 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s fft (input=-0.5dbr, fin=1khz) 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s fft (input=-60dbr, fin=1khz) [AKD4627-A] 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s fft (noise floor) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b f s thd + n vs. input level (fin=1khz) 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b f s thd + n vs. input frequenc y (input level=-0.5dbr) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s tt linearity (fin=1khz) 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -2 +1 -1.7 -1.4 -1.1 -0.8 -0.5 -0.2 +0.1 +0.4 +0.7 d b f s frequency response (input level=-0.5dbr) [AKD4627-A] 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -160 -60 -150 -140 -130 -120 -110 -100 -90 -80 -70 d b crosstalk (input level=-0.5dbr) [AKD4627-A] 2.1 dac (fs=48khz) -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz fft (input=0dbfs, fin=1khz) -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz fft (input=-60dbfs, fin=1khz) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz fft (noise floor) -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 100k 50 100 200 500 1k 2k 5k 10k 20k 50k hz fft (out-of-band noise) [AKD4627-A] -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b r a -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs thd + n vs. input level (fin=1khz) -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz thd + n vs. input frequency (input=0dbfs) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs linearity (fin=1khz) -1 +1 -0.8 -0.6 -0.4 -0.2 +0 +0.2 +0.4 +0.6 +0.8 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz frequency response (including external rc filter) [AKD4627-A] -140 -60 -130 -120 -110 -100 -90 -80 -70 d b 20 20k 50 100 200 500 1k 2k 5k 10k hz t crosstalk [AKD4627-A] 2.2 dac (fs=96khz) -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz fft (input=0dbfs, fin=1khz) -160 +0 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz fft (input=0dbfs, fin=1khz, notch on) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz fft (input=-60dbfs,fin=1khz) -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz fft (noise floor) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 100k 50 100 200 500 1k 2k 5k 10k 20k 50k hz fft (out-of-band noise) [AKD4627-A] -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b r a -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs thd + n vs. input level (fin=1khz) -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b r a 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz thd + n vs. input frequency (input=0dbfs) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs linearity (fin=1khz) -2 +2 -1.8 -1.6 -1.4 -1.2 -1 -0.8 -0.6 -0.4 -0.2 +0 +0.2 +0.4 +0.6 +0.8 +1 +1.2 +1.4 +1.6 +1.8 d b r a 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz frequency response (including external rc filter) [AKD4627-A] -140 -60 -130 -120 -110 -100 -90 -80 -70 d b 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz crosstalk (input=0dbfs) [AKD4627-A] 2.3 dac (fs=192khz) -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 80k 50 100 200 500 1k 2k 5k 10k 20k hz fft (input=0dbfs, fin=1khz) -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 80k 50 100 200 500 1k 2k 5k 10k 20k hz fft (input=0dbfs, fin=1khz, notch on) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 80k 50 100 200 500 1k 2k 5k 10k 20k hz fft (input=-60dbfs,fin=1khz) -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 80k 50 100 200 500 1k 2k 5k 10k 20k hz fft (noise floor) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a 20 100k 50 100 200 500 1k 2k 5k 10k 20k 50k hz fft (out-of-band noise) [AKD4627-A] -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b r a -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs thd + n vs. input level (fin=1khz) -120 -60 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b r a 20 80k 50 100 200 500 1k 2k 5k 10k 20k hz thd + n vs. input frequency (input=0dbfs) [AKD4627-A] -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs linearity (fin=1khz) -3 +3 -2.5 -2 -1.5 -1 -0.5 +0 +0.5 +1 +1.5 +2 +2.5 d b r a 20 80k 50 100 200 500 1k 2k 5k 10k 20k hz frequency response (including external rc filter) [AKD4627-A] -140 -60 -130 -120 -110 -100 -90 -80 -70 d b 20 80k 50 100 200 500 1k 2k 5k 10k 20k hz crosstalk (input=0dbfs) [AKD4627-A] revision history date manual revision board revision reason contents (yy/mm/dd) 2010/08/09 km102000 0 first edition important notice z these products and their specifications are subject to change without notice. when you consider any use or application of these produc ts, please make inquiries the sales office of asahi kasei microdevices corporation (akm) or authorized distributors as to current status of the products. z descriptions of external circuits, application circuits, software and other related information contained in this document are provided only to illustrate the operation and application exampl es of the semiconductor products. you are fully responsible for the incorporation of these external circuits, application circuits, software and other related information in the design of your e quipments. akm assumes no responsibility fo r any losses incurred by you or third parties arising from the use of these information herein. akm assumes no liability for infringement of any patent, intellectual property, or other rights in the applica tion or use of such information contained herein. z any export of these products, or devices or systems containi ng them, may require an export license or other official approval under the law and regulations of the country of e xport pertaining to customs and tariffs, currency exchange, or strategic materials. z akm products are neither intended nor aut horized for use as critical components note1) in any safety, life support, or other hazard related device or system note2) , and akm assumes no responsibility for such use, except for the use approved with the express written consent by representative director of akm. as used here: note1) a critical component is one whose failure to func tion or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. note2) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerosp ace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z it is the responsibility of the buyer or distributor of akm products , who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsib ility and liability for and hold akm harmless from any and all claims arising from the use of said product in the absence of such notification. 5 5 4 4 3 3 2 2 1 1 d d c c b b a a sdti2 sdti3 sdti4 sdti1 i2c dfs0 dzf2 dzf1 avdd1 lout3 rout3 mclk bick lrck rout2 lout2 pdn dif0/csn dif1/scl/cclk tdm0/sda/cdti dvdd ps sdto1 sdto2 tvdd rin2- rin2+/rin2 lin2- lin2+/lin2 rin1- rin1+/rin1 lin1- lin1+/lin1 smute dzfe sgl cad1 rout1 lout1 cad0 title size document number rev date: sheet of ak4627 0 AKD4627-A-main a3 16 wednesday, august 04, 2010 title size document number rev date: sheet of ak4627 0 AKD4627-A-main a3 16 wednesday, august 04, 2010 title size document number rev date: sheet of ak4627 0 AKD4627-A-main a3 16 wednesday, august 04, 2010 rin2- rin2+ lin2- lin2+ rin1- rin1+ lin1+ lin1- sgl dzfe smute cad0 cad1 ps sdto1 sdto2 tvdd dvss dvdd pdn mclk bick lrck sdti1 sdti2 sdti3 dfs0 i2c lout3 rout3 lout2 rout2 lout1 rout1 dzf1 dzf2 avss avdd + c13 2.2u + c13 2.2u r8 100 r8 100 tp7 tp7 cn1 48pin_1 cn1 48pin_1 1 2 3 4 5 6 7 8 9 10 11 12 + c14 2.2u + c14 2.2u tp23 tp23 cn2 48pin_2 cn2 48pin_2 24 23 22 21 20 19 18 17 16 15 14 13 r11 100 r11 100 tp45 tp45 tp39 tp39 tp4 tp4 tp44 tp44 tp36 tp36 tp27 tp27 r10 100 r10 100 tp13 tp13 + c15 2.2u + c15 2.2u tp1 tp1 r9 100 r9 100 tp9 tp9 + c16 2.2u + c16 2.2u + c4 10u + c4 10u tp25 tp25 r14 100 r14 100 tp18 tp18 c3 0.1u c3 0.1u tp43 tp43 r13 100 r13 100 tp19 tp19 + c9 2.2u + c9 2.2u tp20 tp20 c7 0.1u c7 0.1u tp42 tp42 tp5 tp5 cn4 48pin_4 cn4 48pin_4 37 38 39 40 41 42 43 44 45 46 47 48 + c8 2.2u + c8 2.2u tp21 tp21 tp11 tp11 tp15 tp15 tp37 tp37 r2 100 r2 100 tp29 tp29 r3 100 r3 100 tp16 tp16 r6 100 r6 100 tp22 tp22 r4 100 r4 100 tp31 tp31 c5 0.1u c5 0.1u tp14 tp14 tp8 tp8 tp2 tp2 tp3 tp3 r5 100 r5 100 + c6 10u + c6 10u tp26 tp26 tp17 tp17 tp28 tp28 tp35 tp35 tp32 tp32 u1 ak4627 u1 ak4627 rin2- 37 rin2+/rin2 38 lin2- 39 lin2+/lin2 40 rin1- 41 rin1+/rin1 42 lin1- 43 lin1+/lin1 44 tst1 45 sgl 46 dzfe 47 smute 48 cad0 1 cad1 2 ps 3 sdto1 4 sdto2 5 tvdd 6 dvdd 7 dvss 8 tdm0/sda/cdti 9 dif1/scl/cclk 10 dif0/csn 11 pdn 12 tst5 24 tst4 23 i2c 21 dfs0 20 tst3 19 sdti3 18 sdti2 17 sdti1 16 lrck 15 bick 14 mclk 13 dzf2 36 dzf1 35 avss 34 avdd 33 vrefh 32 vcom 31 rout1 30 lout1 29 rout2 28 lout2 27 rout3 26 lout3 25 tst2 22 tp6 tp6 tp10 tp10 + c10 2.2u + c10 2.2u + c2 10u + c2 10u c1 0.1u c1 0.1u cn3 48pin_3 cn3 48pin_3 25 26 27 28 29 30 31 32 33 34 35 36 tp38 tp38 tp24 tp24 tp12 tp12 + c11 2.2u + c11 2.2u tp40 tp40 + c12 2.2u + c12 2.2u r7 100 r7 100 -61- 5 5 4 4 3 3 2 2 1 1 d d c c b b a a +3.3v xti dif0 xto ocks0 ocks1 cm1 cm0 pdn +3.3v +3.3v xto +3.3v xti +3.3v +3.3v dif1 dif2 4118_bick 4118_mcko1 4118_mcko2 4118_lrck 4118_sdto daux title size document number rev date: sheet of 0 AKD4627-A-main a4 16 wednesday, august 04, 2010 title size document number rev date: sheet of 0 AKD4627-A-main a4 16 wednesday, august 04, 2010 title size document number rev date: sheet of 0 AKD4627-A-main a4 16 wednesday, august 04, 2010 rx opt bnc opt bnc 1:1 tx ak4118 r21 75 r21 75 jp15 mclk_sel jp15 mclk_sel r23 240 r23 240 int0 int0 + c19 10u + c19 10u r22 150 r22 150 r24 5.1 r24 5.1 jp16 bick_sel jp16 bick_sel c18 0.1u c18 0.1u jp11 rx3 jp11 rx3 r20 470 r20 470 jp17 lrck_sel jp17 lrck_sel u2 ak4118 u2 ak4118 ips0/rx4 1 nc 2 dif0/rx5 3 test2 4 dif1/rx6 5 vss1 6 dif2/rx7 7 ips1/iic 8 p/sn 9 xtl0 10 xtl1 11 vin/gp0 12 tvdd 13 gp1 14 tx0/gp2 15 tx1/gp3 16 bout/gp4 17 cout/gp5 18 uout/gp6 19 vout/gp7 20 dvdd 21 vss2 22 mcko1 23 lrck 24 sdto 25 bick 26 mcko2 27 daux 28 xto 29 xti 30 pdn 31 cm0/cdto/cad1 32 cm1/cdti/sda 33 ocks1/cclk/scl 34 ocks0/csn/cad0 35 int0 36 int1 37 avdd 38 r 39 vcom 40 vss3 41 rx0 42 nc 43 rx1 44 test1 45 rx2 46 vss4 47 rx3 48 jp12 tx jp12 tx port1 torx141 port1 torx141 out 1 vcc 3 gnd 2 c28 0.1u c28 0.1u jp14 sdto_sel jp14 sdto_sel x1 24.576mhz x1 24.576mhz 1 2 c24 5p c24 5p j1 bnc_rx j1 bnc_rx c20 0.1u c20 0.1u + c29 10u + c29 10u l1 (short) l1 (short) 1 2 + c26 10u + c26 10u r25 10k r25 10k + c21 10u + c21 10u port2 totx141 port2 totx141 gnd 1 vcc 2 in 3 t3 da02 t3 da02 c22 0.1u c22 0.1u c25 0.1u c25 0.1u c27 0.1u c27 0.1u + c17 0.47u + c17 0.47u j2 bnc_tx j2 bnc_tx c23 5p c23 5p -62- 5 5 4 4 3 3 2 2 1 1 d d c c b b a a rin2+/rin2 rin2- lin2+/lin2 lin2- lin1+/lin1 lin1- rin1+/rin1 rin1- title size document number rev date: sheet of |